Author:
Grisamore Robert T.,Swartzlander Earl E.
Publisher
Springer Science and Business Media LLC
Subject
Hardware and Architecture,Modelling and Simulation,Information Systems,Signal Processing,Theoretical Computer Science,Control and Systems Engineering
Reference8 articles.
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2. L. Dadda, “Some Schemes for Parallel Multipliers,” Alta Freq., vol. 34, 1965, pp. 349–356.
3. A. D. Booth, “A Signed Binary Multiplication Technique,” Q. J. Mech. Appl. Math., vol. 4(Pt. 2), 1951, pp. 236–240.
4. O. L. MacSorley, “High-speed Arithmetic in Binary Computers,” Proc. IRE, vol. 49,1961, pp. 67–91.
5. G. W. Bewick, Fast Multiplication: Algorithms and Implementation, Doctoral Dissertation, Stanford University, 1994, pp. 138–143.
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