Funder
National Science Foundation
Publisher
Springer Science and Business Media LLC
Subject
Hardware and Architecture,Modelling and Simulation,Information Systems,Signal Processing,Theoretical Computer Science,Control and Systems Engineering
Reference31 articles.
1. Ade, M., Lauwereins, R., & Peperstraete, J. (1997). Data memory minimisation for synchronous data flow graphs emulated on DSP-FPGA targets. In Proceedings of the Design Automation Conference, pp. 64–69.
2. Benazouz, M., Marchetti, O., Munier-Kordon, A., & Urard, P. (2010). A new approach for minimizing buffer capacities with throughput constraint for embedded system design. In Proceedings of the ACS/IEEE International Conference on Computer Systems and Applications, pp. 1–8.
3. Bhattacharyya, S.S., Deprettere, E., & Leupers, R. (2019) In Takala, J. (Ed.), Handbook of Signal Processing Systems, 3rd edn. Berlin: Springer.
4. Bhattacharyya, S.S., & Lee, E.A. (1992). Memory management for synchronous dataflow programs. Tech. Rep. UCB/ERL M92/128, Electronics Research Laboratory University of California at Berkeley.
5. Bilsen, G., Engels, M., Lauwereins, R., & Peperstraete, J.A. (1996). Cyclo-static dataflow. IEEE Transactions on Signal Processing, 44(2), 397–408.
Cited by
2 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献