CLA Formula and its Acceleration of Architecture Design for Clustered Look-Ahead Pipelined Recursive Digital Filter-Reference-Cited by-同舟云学术

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CLA Formula and its Acceleration of Architecture Design for Clustered Look-Ahead Pipelined Recursive Digital Filter

Published:2020-11-07 Issue: Volume: Page:
ISSN:1939-8018
Container-title:Journal of Signal Processing Systems
language:en
Short-container-title:J Sign Process Syst

Author:

Zheng Muhan^ORCID,Luo Yuanyong,Pan Hongbing,Wang Zhongfeng,Xue Yuan

Funder

National Natural Science Foundation of China

Jiangsu Provincial Key Research and Development Program

Publisher

Springer Science and Business Media LLC

Subject

Hardware and Architecture,Modelling and Simulation,Information Systems,Signal Processing,Theoretical Computer Science,Control and Systems Engineering

Link

http://link.springer.com/content/pdf/10.1007/s11265-020-01607-1.pdf

Reference20 articles.

1. Joshi, R.M., Madanayake, A., Adikari, J., & Bruton, L.T. (2012). Synthesis and array processor realization of a 2-D IIR beam filter for wireless applications. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 20(12), 2241–2254.

2. Nongpiur, R.C., Shpak, D.J., & Antoniou, A. (2014). Design of IIR digital differentiators using constrained optimization. IEEE Transactions on Signal Processing, 62(7), 1729–1739 .

3. Kennedy, H. (2015). Recursive digital filters with tunable lag and lead characteristics for proportional-differential control. IEEE Transactions on Control Systems Technology, 23(6), 2369–2374.

4. Xiao, F. (2014). Fast design of IIR digital filters with a general chebyshev characteristic. IEEE Transactions on Circuits and Systems II: Express Briefs, 61(12), 962–966.

5. Chen, Y., Zhang, X., Lian, Y., Manohar, R., & Tsividis, Y. (2018). A continuous-time digital IIR filter with Signal-Derived timing and fully agile power consumption. IEEE Journal of Solid-State Circuits, 53(2), 418–430.

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