Improving Floating-Point Performance in Less Area: Fractured Floating Point Units (FFPUs)

Author:

Hockert Neil,Compton Katherine

Publisher

Springer Science and Business Media LLC

Subject

Hardware and Architecture,Modeling and Simulation,Information Systems,Signal Processing,Theoretical Computer Science,Control and Systems Engineering

Reference23 articles.

1. Hauser, J. R. (2002). SoftFloat Release 2b. Available online at http://www.jhauser.us/arithmetic/SoftFloat.html .

2. Altera Corporation. (2009). Nios II processor reference handbook. San Jose: Altera Corporation.

3. Floating-Point Arithmetic, IEEE Standard 754-2008, 2008.

4. Kadlec, J., Bartosinski, R., Danek, M. (2007). Accelerating microblaze floating point operations. International Conference on Field-Programmable Logic and Applications, 621–624.

5. Beauchamp, M. J., Hauck, S., Underwood, K. D., Hemmert, K. S. (2006). Embedded floating-point units in FPGAs. ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 12–20.

Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Hybrid Hardware/Software Floating-Point Implementations for Optimized Area and Throughput Tradeoffs;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2017-01

2. Area Optimization of Arithmetic Units by Component Sharing for FPGAs (Abstract Only);Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays;2015-02-22

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