Author:
Jääskeläinen Pekka,Kultala Heikki,Viitanen Timo,Takala Jarmo
Publisher
Springer Science and Business Media LLC
Subject
Hardware and Architecture,Modelling and Simulation,Information Systems,Signal Processing,Theoretical Computer Science,Control and Systems Engineering
Reference41 articles.
1. Advanced Micro Devices, Inc.: Evergreen Family Instruction Set Architecture Instructions and Microcode Reference Guide (2011). Rev. 1.1a.
2. Balfour, J., Halting, R., Dally, W. (2009). Operand registers and explicit operand forwarding. Computer Architecture Letters, 8(2), 60–63. doi: 10.1109/L-CA.2009.45 .
3. Bardizbanyan, A., Själander, M., Larsson-Edefors, P. (2011). Reconfigurable instruction decoding for a wide-control-word processor. In Proceedings IEEE international symposium on parallel and distributed processing (pp. 322–325).
4. Black-Schaffer, D., Balfour, J., Dally, W., Parikh, V., Park, J. (2008). Hierarchical instruction register organization. Computer Architecture Letters, 7 (2), 41–44. doi: 10.1109/L-CA.2008.7 .
5. Cilio, A., Schot, H., Janssen, J. (2006). Architecture definition file: processor architecture definition file format for a new TTA design framework. Finland: Tampere University of Technology. http://tce.cs.tut.fi/specs/ADF.pdf .
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