1. A. DeHon, “Reconfigurable Architectures for General-Purpose Computing,” Ph.D thesis, MIT, August 1996.
2. O.T. Albaharna, P. Cheung, and T.J. Clarke, “On the Viability of FPGA-Based Integrated Coprocessors,” IEEE Symposium on FPGAs for Custom Computing Machines, April 1996.
3. S.D. Haynes and P.Y. Cheung, “Configurable Multiplier Blocks for use within a FPGA,” IEEE Trans on Computers, vol. 3, no. 1, 1998, pp. 638–639.
4. K. Rajagopalan and P. Sutton, “A Flexible Multiplication Unit for an FPGA Logic Block,” IEEE Trans on Circuits and Systems, vol. 4, 2001, pp. 546–549.
5. http://www.xilinx.com/partinfo/ds022.pdf .