1. Agrawal, A.K., Wairya, S., Nagaria, R.K., Tiwari, S.: A New Mixed Gate Diffusion Input Full Adder Topology for High Speed Low Power Digital Circuits. World Applied Sciences Journal (Special Issue of Computer & IT) 7, 138–144 (2009)
2. Zimmermann, R., Fichtner, W.: Low-power logic styles: CMOS versus pass-transistor logic. IEEE J. Solid-State Circuits 32, 1079–1090 (1997)
3. Calhoun, B., Cao, Y., Li, X., Mai, K., Pileggi, L., Rutenbar, R., Shepard, K.: Digital Circuit Design Challenges and Opportunities in the Era of Nanoscale CMOS. Proceedings of the IEEE 96(2), 343–365 (2008)
4. Al-Assadi, W., Jayasumana, A.P., Malaiya, Y.K.: Pass-transistor logic design. Int. J. Electron. 70, 739–749 (1991)
5. Morgenshtein, A., Fish, A., Wagner, I.A.: Gate-Diffusion Input (GDI): A Power-Efficient Method for Digital Combinatorial Circuits. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 10(5) (October 2002)