Author:
Palchaudhuri Ayan,Chakraborty Rajat Subhra
Reference6 articles.
1. Cortadella, J., Llabería, J.: Evaluation of
$$A+B=K$$
A
+
B
=
K
conditions without carry propagation. IEEE Trans. Comput. 41(11), 1484–1487 (1992)
2. Hachtel, G.D., Somenzi, F.: Logic Synthesis and Verification Algorithms. Kluwer Academic Publisher, Boston (1996)
3. Preu
$$\beta $$
β
er, T.B., Spallek, R.G.: Mapping basic prefix computations to fast carry–chain structures. In: Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), pp. 604–608 (2009)
4. Roy, S.S., Rebeiro, C., Mukhopadhyay, D.: Theoretical modeling of the Itoh-tsujii inversion algorithm for enhanced performance on
$$k$$
k
–LUT based FPGAs. In: Design, Automation and Test in Europe Conference and Exhibition (DATE), pp. 1–6 (2011)
5. Verma, A.K., Brisk, P., Ienne, J.P.: Challenges in automatic optimization of arithmetic circuits. In: Proceedings of the 19th IEEE Symposium on Computer Arithmetic (ARITH), pp. 213–218 (2009)