A novel ortho normalized multi-stage discrete fast Stockwell transform based memory-aware high-speed VLSI implementation for image compression

Author:

kiranmaye G,Tadisetty Srinivasulu

Publisher

Springer Science and Business Media LLC

Subject

Computer Networks and Communications,Hardware and Architecture,Media Technology,Software

Reference30 articles.

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2. Cheng C, Keshab Parhi K (2008) High-speed VLSI implementation of the 2-D discrete wavelet transform. IEEE Trans Signal Process 56(1):393–403

3. Darji A et al (2014) Dual-scan parallel flipping architecture for a lifting-based 2-D discrete wavelet transform. IEEE Trans Circ Syst II: Express Briefs 61(6):433–437

4. Das A, Hazra A, Banerjee S (2012) An efficient architecture for 3-D discrete wavelet transform. IEEE Trans Circ Syst Video Technol 20(2):286–296

5. Haghighi BB, Taherinia AH, Mohajerzadeh AH (2018) TRLG: Fragile blind quad watermarking for image tamper detection and recovery by providing compact digests with quality optimized using LWT and GA. arXiv preprint arXiv:1803.02623

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