AN OFFSET CALIBRATION METHOD FOR A HIGH-SPEED RECEIVER

Abstract

Nowadays VLSI circuits have various applications such as mobile devices, IOT devices, PCs, automobiles, military and space systems, etc. Analog parts, such as operati¬o¬n¬a¬l amplifiers, rectifiers, analog-to-digital converters play major roles inside the modern inte¬gr¬a¬t¬ed circuits (IC). In VLSI designs external voltage source values do not have high precision and currently schematic designs are implemented considering the ±10% variation of the supply voltage values. However, such accuracy levels cause problems in high speed receivers where variation of voltages even with a few millivolts can result in major inaccuracies such as the offset voltage in the receiving path. Such problems do exist in high-speed data receivers where the swing of the received data can be less than 100 mV. In this paper an offset cancelation technique for a high speed receiver path is presented which can lower the offset voltage up to ±5 mV range covering the 4.5 sigma possible technology variation range.