A Study of Process-Induced Residual Stress in PBGA Packages

Author:

Wu Zhu1,Lu Jian1,Guo Yifan2

Affiliation:

1. Laboratory of Mechanical Systems and Concurrent Engineering (LASMIS), Universite de Technologie de Troyes, 12 rue Marie Curie, BP 2060, 10010 Troyes, France

2. Packaging Mechanics, Semiconductor Products Sector, Motorola, 2100 East Elliot Road, Tempe, AZ 85284

Abstract

Process-induced residual stresses can play a significant role in the reliability of electronic components and packages. In this paper, a practical method is developed to determine residual stresses for electronic packaging. In this method, blind holes are drilled into the specimens and relationships are established, between the released surface displacements and the corresponding residual stress, by introducing a set of calibration coefficients. A multilayer 3D-FEM model is established to determine the relevant calibration coefficients. This methodology, which combines moire´ interferometry and the incremental hole drilling method, can provide an accurate determination of residual stresses in materials and structures by precisely controlled incremental blind-hole drilling and an accurate determination of the surface in-plane displacement fields in the hole drilling region. The methodology is implemented by investigating the residual stress in the Plastic Ball Grid Array (PBGA) packages. The tensile residual stresses are determined in both the plastic molding compound and the glass/epoxy laminate chip carrier. The method is accurate, simple, convenient, and practical. More applications, in residual stress determinations and in process evaluations in electronic packaging, are anticipated. [S1043-7398(00)00103-1]

Publisher

ASME International

Subject

Electrical and Electronic Engineering,Computer Science Applications,Mechanics of Materials,Electronic, Optical and Magnetic Materials

Reference17 articles.

1. Freyman, B., and Pennisi, R., May 1991, “Overmolded Plastic Pad Array Carriers (OMPAC): a Low Cost, High Interconnect Density IC Packaging Solution for Consumer and Industrial Electronics,” Proceedings of the 41st Electronic Components and Technology Conference (ECTC), pp. 176–182.

2. Lau, J. H., 1995, Ball Grid Array Technology, McGraw-Hill, New York, NY.

3. Wu, T., 1995, “Process-Induced Residual Stresses in a Glob Top Encapsulated Silicon Chip,” Applications of Fracture Mechanics to Electronic Packaging and Materials, EEP, Vol. 11, MD-Vol. 64, ASME, pp. 123–131.

4. Guo, Y., 1995, “Applications of Shadow Moire´ Method in Determinations of Thermal Deformations in Electronic Packaging,” Proc. of 1995 SEM Spring Conf. On Exp. Mech., Grand Rapids, MI, June.

5. Jung, W., Lau, J. H., and Pao, Y. H., 1997, “Nonlinear Analysis of Full-Matrix and Perimeter Plastic Ball Grid Array Solder Joints,” ASME J. Electron. Packag., 119, pp. 163–170.

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