A Thermo-Viscoelastic Analysis and Reliability Evaluation for a Single-Sided CSP

Author:

Koguchi Hideo1,Ishida Mirai1,Nishida Kazuto2,Kuroishi Tomoaki2

Affiliation:

1. Nagaoka University of Technology, Nagaoka, Niigata, Japan

2. Matushita Electric Industrial Company, Ltd., Kadoma, Osaka, Japan

Abstract

In the present paper, a reliability of a single-sided chip-size package (CSP) manufactured using a non-conductive adhesive stud bump direct interconnection method is investigated. The reliability of the CSP is closely related with normal stress between an IC chip and a gold bump. Total normal stress can be decomposed into two parts, deflection related and thermal expansion related. The deflection for a three-layered plate, which is taken into account viscoelastic properties for the resin-sealed sheet and the substrate, respectively, is calculated and compared with experimental results on the deflection of the single-sided CSP. A relationship between the normal stress and the curvature derived from deflection is deduced. Through the use of this relationship, the variation of normal stress with the heat cycle is obtained considering the viscoelastic properties of materials. Furthermore, a relaxation behavior for the thermal stress in the resin-sealed sheet between two rigid walls considering its viscoelastic property is investigated. Summing up normal stresses for each calculation yields the normal stress between the IC and the bump. A relationship between the normal stress and the life of single-sided CSP is investigated for heat cycle. The life in experiment can be explained by the relaxation in the normal stress and the amplitude of the normal stress.

Publisher

ASMEDC

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