LSI-package Co-design Methodology for Thin Embedded-LSI Package Used as Bottom Package of Package-on-Package Structures-Reference-Cited by-同舟云学术

LSI-package Co-design Methodology for Thin Embedded-LSI Package Used as Bottom Package of Package-on-Package Structures

Published:2014 Issue:1 Volume:7 Page:104-113
ISSN:1883-3365
Container-title:Transactions of The Japan Institute of Electronics Packaging
language:en
Short-container-title:Transactions of The Japan Institute of Electronics Packaging

Author:

Ohshima Daisuke¹²,Nakashima Yoshiki³,Kikuchi Katsumi⁴,Takemura Koichi¹⁴,Masu Kazuya¹

Affiliation:

1. Department of Electronics and Applied Physics, Interdisciplinary Graduate School of Science and Engineering, Tokyo Institute of Technology

2. MONOZUKURI Innovation Division, NEC Corporation

3. Smart Energy Research Laboratories, NEC Corporation

4. Green Platform Research Laboratories, NEC Corporation

Publisher

Japan Institute of Electronics Packaging

Link

https://www.jstage.jst.go.jp/article/jiepeng/7/1/7_104/_pdf

Reference11 articles.

1. [1] K. Masu, "Opportunity and Challenge of Integrated Circuits with Diverse Functionalities," The 51st Meeting of JSPS #171 Committee on Photonic Network System Technology, March 2014 (in Japanese).

2. [2] JEDEC SST Association, Wide I/O SDR DRAM Standard, JESD229, Dec. 2011.

3. [3] JEDEC SST Association, Low Power Double Data Rate 3 (LPDDR3), JESD209-3, May 2012.

4. [4] R. Nickerson, R. Olmedo, R. Mortensen, K. C. Chee, S. Goyal, L. L. Ai, and C. Gealer, "Application of Coreless Substrate to Package on Package Architectures," Proc. of 62nd Electronic Components and Technology Conf., San Diego, CA, pp. 1368-1371, May 2012.

5. [5] J. Kim, K. Lee, D. Park, T. Hwang, K. Kim, D. Kang, J. Kim, C. Lee, C. Scanlan, C. J. Berry, C. Zwenger, L. Smith, M. Dreiza, and R. Darveaux, "Application of through mold via (TMV) as PoP base package," Proc. of 58th Electronic Components and Technology Conf., Miami, FL, pp. 1089-1092, May 2008.