Warpage Mechanism of Thin Embedded LSI Packages

Author:

Nakashima Yoshiki,Kikuchi Katsumi,Mori Kentaro,Ohshima Daisuke,Yamamichi Shintaro

Publisher

Japan Institute of Electronics Packaging

Reference12 articles.

1. [1] ITRS 2009, Assembly and Packaging White Paper.

2. [2] K. Mori, et al., "A Novel Ultra-Thin Package for Embedded High-Pin-Count-LSI Supported by Cu plate," Proc. 59th IEEE Electronic Components and Technology Conf., San Diego, CA, May 2009.

3. [3] D. Ohshima, et al., "Electrical Design and Demonstration of an Embedded High-pin-count LSI Chip package," Proc. 59th IEEE Electronic Components and Technology Conf., San Diego, CA, May 2009.

4. [4] H. Murai, et al., "A Direct Fanning-out Packaging Technology using Cu Base Plate for Embedded Fine-pad-pitch LSI," Proc. 42nd IMAPS, San Jose, CA, November 2009.

5. [5] K. Mori, et al., "Embedded Active Packaging Technology for High-pin-count LSI with Cu plate." Proc. 60th IEEE Electronic Components and Technology Conf., Las Vegas, NV, June 2010.

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