The Influence that Via Structure and Its Near Wirings Give to Transmission Line Loss in High-Speed Transmission PCB

Author:

Sugimoto Kaoru1,Kawai Kenichi2,Adachi Hiroyuki2,Mizutani Daisuke3,Akahoshi Tomoyuki3,Yokouchi Kishio1,Watanabe Mitsuhiro4,Honma Hideo4

Affiliation:

1. Business Development Division, Fujitsu Interconnect Technologies Limited,

2. Technology Development Division, Advanced System Research & Development Unit, Fujitsu Limited,

3. Monozukuri Technologies Laboratory, Fujitsu Laboratories Ltd.,

4. Materials & Surface Engineering Research Institute, Kanto Gakuin University

Publisher

Japan Institute of Electronics Packaging

Subject

Electrical and Electronic Engineering

Reference5 articles.

1. 11) N. Na and J. Audet: “ASIC packaging challenges with high speed interfaces,” Proceedings IEEE EDAPS2008, pp. 20-23, 2008

2. 12) N. Na, J. Audet, and D. Zwitter: “Discontinuity impacts and design considerations of high speed differential signals in FC-PBGA packages with high wiring density,” Proceedings IEEE EPEP2005, pp. 107-110, 2005

3. 13) N. Na, M. Baily, and A. Kalantarian: “Package Performance Improvement with Counter-Discontinuity and its Effective Bandwidth,” Proceedings IEEE EPEP2007, pp. 163-166, 2007

4. 14) W. Y. Chang, Richard, K. Y. See, and E. K. Chua: “Comprehensive Analysis of the Impact of Via Design on High-Speed Signal Integrity,” Proceedings IEEE 9th EPTC2007, pp. 262-266, 2007

5. 15) IEEE Computer Society: “Part 3: Carrier Sense Multiple Access with Collision Detection (CSMA/CD) Access Method and Physical Layer Specifications,” IEEE Std 802.3ap™-2007, 22.May.2007, p. 178, 69B.4.6.4

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