Impact of interface trap density at metal/SiNx/n+ MOS capacitor in multilayered Si solar cells

Abstract

Impact of the SiNx/n+-Si interface on silicon solar cell performance was investigated, where SiNx is used as a passivation layer. Significant shifts in capacitance, conductance and leakage current characteristics were observed for metal/SiN:H/n+-Si MOS capacitor when it was subjected to a constant voltage stress of +10 V at room temperature. The interface trap density (Dit) across the SiN:H/n+-Si interface increased from 6·3 × 109 to 7·5 × 109 cm−2eV−1 after a 500-s stress whereas the n+/p junction diode remained unaffected by the stress. A direct correlation between the degradation of SiN:H/Si interface and the solar cell performance was observed.