Demonstration of a 12 nm-half-pitch copper ultralow-k interconnect process-Reference-Cited by-同舟云学术

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Demonstration of a 12 nm-half-pitch copper ultralow-k interconnect process

Published:2013-06 Issue: Volume: Page:
ISSN:
Container-title:2013 IEEE International Interconnect Technology Conference - IITC
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Author:

Chawla J. S.,Chebiam R.,Akolkar R.,Allen G.,Carver C. T.,Clarke J. S.,Gstrein F.,Harmes M.,Indukuri T.,Jezewski C.,Krist B.,Lang H.,Myers A.,Schenker R.,Singh K. J.,Turkot R.,Yoo H. J.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/6596165/6615543/06615593.pdf?arnumber=6615593

Cited by 7 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Review—Beyond the Highs and Lows: A Perspective on the Future of Dielectrics Research for Nanoelectronic Devices;ECS Journal of Solid State Science and Technology;2019

2. Process Technology for Copper Interconnects;Handbook of Thin Film Deposition;2018

3. ASAP7: A 7-nm finFET predictive process design kit;Microelectronics Journal;2016-07

4. Scanning electron microscope measurement of width and shape of 10 nm patterned lines using a JMONSEL-modeled library;Ultramicroscopy;2015-07

5. 3D Monte Carlo modeling of the SEM: Are there applications to photomask metrology?;SPIE Proceedings;2014-10-10

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