A Fast-Settling Integer-$N$ Frequency Synthesizer Using Switched-Gain Control
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/8919/9049235/08943967.pdf?arnumber=8943967
Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Fast Settling Phase-Locked Loops: A Comprehensive Survey of Applications and Techniques [Feature];IEEE Circuits and Systems Magazine;2024
2. A Fast-Settling Phase-Locked Loop Utilizing Cycle-Slipping-Elimination PFDCP;IEEE Transactions on Circuits and Systems II: Express Briefs;2022-10
3. Low Power CMOS Design of Phase Locked Loop for Fastest Frequency Acquisition at Various Nanometer Technologies;Wireless Personal Communications;2022-03-07
4. PFD with improved average gain and minimal blind zone combined with lock-in detection for fast settling PLLs;Microelectronics Journal;2021-10
5. A Novel Fast-Locking ADPLL Based on Bisection Method;Electronics;2021-06-09
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