A Binary Line Buffer Circuit Featuring Lossy Data Compression at Fixed Maximum Data Rate
-
Published:2020-01
Issue:1
Volume:67
Page:121-134
-
ISSN:1549-8328
-
Container-title:IEEE Transactions on Circuits and Systems I: Regular Papers
-
language:
-
Short-container-title:IEEE Trans. Circuits Syst. I
Author:
Napoli Ettore,De Caro Davide,Petra Nicola,Strollo Antonio Giuseppe Maria
Funder
Department of Electrical and Information Technology Engineering ViRoS grant
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering