Continuous-Time $\Delta \Sigma $ Modulators With Improved Linearity and Reduced Clock Jitter Sensitivity Using the Switched-Capacitor Return-to-Zero DAC
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/4/6564404/06515127.pdf?arnumber=6515127
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