A 15-Gb/s Sub-Baud-Rate Digital CDR
Author:
Funder
Semiconductor Research Corporation
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/4/8649832/08599124.pdf?arnumber=8599124
Cited by 10 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. A 6.0–11.0 Gb/s Reference-Less Sub-Baud-Rate Linear CDR With Wide-Range Frequency Acquisition Technique;IEEE Transactions on Circuits and Systems II: Express Briefs;2023-02
2. A 0.079-pJ/b/dB 32-Gb/s 2$\times$ Half-Baud-Rate CDR Circuit With Frequency Detector;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023
3. A 12.93–16 Gb/s Reference-Less Baud-Rate CDR Circuit With One-Tap DFE and Semirotational Frequency Detection;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023
4. A 50-Gb/s NRZ Receiver Targeting Low-Latency Multi-Chip Module Optical I/O in 45-nm SOI CMOS;2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS);2022-11-11
5. A 14-Gb/s PAM4 Reference-Less Half-Baud-Rate CDR;2022 IEEE International Symposium on Circuits and Systems (ISCAS);2022-05-28
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