Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Cited by
3 articles.
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1. An Injection-Locked and Sub-Sampling Clock Multiplier With a Two-Step SC DAC Achieving 2.67% Jitter Variation;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2024
2. Post-Silicon Optimization of a Highly Programmable 64-MHz PLL Achieving 2.7-5.7 μW;2023 Design, Automation & Test in Europe Conference & Exhibition (DATE);2023-04
3. Design of 0.6v 0.01mm2 Sub Sampling PLL Based On Dynamic Double Loops;The 2022 5th International Conference on Electronics, Communications and Control Engineering;2022-03-25