A Low Voltage SRAM Using Resonant Supply Boosting

Author:

Joshi Rajiv V.,Ziegler Matthew M.ORCID,Wetter Holger

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Group LARS-Based Iterative Reweighted Least Squares Methodology for Efficient Statistical Modeling of Memory Designs;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2022-12

2. An offset cancellation technique for SRAM sense amplifier based on relation of the delay and offset;Microelectronics Journal;2022-10

3. A 350 mV, 2 MHz, 16-kb SRAM with programmable wordline boosting in the 65 nm CMOS technology;Analog Integrated Circuits and Signal Processing;2021-07-12

4. Resonant Energy Recycling SRAM Architecture;IEEE Transactions on Circuits and Systems II: Express Briefs;2021-04

5. Addressing Failure and Aging Degradation in MRAM/MeRAM-on-FDSOI Integration;IEEE Transactions on Circuits and Systems I: Regular Papers;2019-01

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