13.7 A 1Tb Density 3b/Cell 3D-NAND Flash on a 2YY-Tier Technology with a 300MB/s Write Throughput-Reference-Cited by-同舟云学术

13.7 A 1Tb Density 3b/Cell 3D-NAND Flash on a 2YY-Tier Technology with a 300MB/s Write Throughput

Published:2024-02-18 Issue: Volume: Page:244-246
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Container-title:2024 IEEE International Solid-State Circuits Conference (ISSCC)
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Author:

Kawai Koichi¹,Einaga Yuichi¹,Oikawa Yoko¹,He Yankang²,Iorio Biagio³,Yamada Shigekazu¹,Kamata Yoshihiko¹,Iwasaki Tomoko²,D’Alessandro Andrea³,Yu Erwin²,Muralidharan Arvind⁴,Li Qinge²,Nguyen Henry²,Chan Kim-Fung²,Piccardi Michele²,Ichikawa Takaaki¹,Yu Jeff²,Wang Guan²,Kim Kwangwon²,Kim Chulbum²,Mangalindan Paolo⁴,Yun Hojung²,Nubile Luca³,Verma Kapil²,Bhushan Sushanth²,Srinivasan Dheeraj²,Kuge Hidehiko¹,Subramanian Rajesh⁵,Kishimoto Jiro¹,Kamijo Toru¹,Musunuri Padma²,Siau Chang²,Ghodsi Ramin²

Affiliation:

1. Micron Technology,Tokyo,Japan

2. Micron Technology,San Jose,CA

3. Micron Technology,Avezzano,Italy

4. Micron Technology,Folsom,CA

5. Micron Technology,Hyderabad,India

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10454133/10454267/10454296.pdf?arnumber=10454296

Reference6 articles.

1. 30.1 A 176-Stacked 512Gb 3b/Cell 3D-NAND Flash with 10.8Gb/mm2 Density with a Peripheral Circuit Under Cell Array Architecture

2. A 1-Tb Density 4b/Cell 3D-NAND Flash on 176-Tier Technology with 4-Independent Planes for Read using CMOS-Under-the-Array

3. A 1-Tb 4b/Cell 4-Plane 162-Layer 3D Flash Memory With a 2.4-Gb/s I/O Speed Interface

4. A High-Performance 1Tb 3b/Cell 3D-NAND Flash with a 194MB/s Write Throughput on over 300 layers;Kim

5. A 1Tb 3b/Cell 3D-Flash Memory of more than 17Gb/mm² bit density with 3.2Gbps interface and 205MB/s program throughput