13.2 A Fully-Integrated 40-nm 5-6.5 GHz Cryo-CMOS System-on-Chip with I/Q Receiver and Frequency Synthesizer for Scalable Multiplexed Readout of Quantum Dots-Reference-Cited by-同舟云学术

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13.2 A Fully-Integrated 40-nm 5-6.5 GHz Cryo-CMOS System-on-Chip with I/Q Receiver and Frequency Synthesizer for Scalable Multiplexed Readout of Quantum Dots

Published:2021-02-13 Issue: Volume: Page:
ISSN:
Container-title:2021 IEEE International Solid- State Circuits Conference (ISSCC)
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Author:

Ruffino Andrea,Peng Yatao,Yang Tsung-Yeh,Michniewicz John,Gonzalez-Zalba Miguel Fernando,Charbon Edoardo

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9365732/9365735/09365758.pdf?arnumber=9365758

Cited by 52 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Cryo-VCSELs Operated at 2.8 K and 40 K With Record Bandwidth, Power, and Linearity for Optical Data Links in Quantum Computing;IEEE Journal of Quantum Electronics;2024-10

2. Measurement of cryoelectronics heating using a local quantum dot thermometer in silicon;Chip;2024-09

3. Leveraging off-the-shelf silicon chips for quantum computing;Applied Physics Letters;2024-06-24

4. A Sub mW Low Flicker Noise Cryo-CMOS QVCO for Quantum Computing Application;2024 IEEE/MTT-S International Microwave Symposium - IMS 2024;2024-06-16

5. Sub-10-GHz Cryo-CMOS LNAs Achieving Up to 0.07-dB Average NF Thanks to Back Biasing for Qubit Readout in 28-nm FD-SOI;2024 IEEE/MTT-S International Microwave Symposium - IMS 2024;2024-06-16

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