27.2 14.1-ENOB 184.9dB-FoM Capacitor-Array-Assisted Cascaded Charge-Injection SAR ADC

Author:

Choo Kyojin,An Hyochan,Sylvester Dennis,Blaauw David

Publisher

IEEE

Cited by 13 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A 16-bit 4-MS/s SAR ADC With Dual-Segmental Bit Weight Self-Calibration;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-09

2. The Race for the Extra Pico Second without Losing the Decibel: A Partial-Review of Single-Channel Energy-Efficient High-Speed Nyquist ADCs;2024 IEEE Custom Integrated Circuits Conference (CICC);2024-04-21

3. Energy Efficient ADC Design Techniques;2024 IEEE Custom Integrated Circuits Conference (CICC);2024-04-21

4. A 7 GHz ERBW 1.1 GS/s 6-bit PVT Tolerant Asynchronous Charge-Injection SAR With Only 8.5 fF Input Capacitance in 28 nm CMOS;IEEE Journal of Solid-State Circuits;2024-03

5. 9.9 A 2.72fJ/conv 13b 2MS/s SAR ADC Using Dynamic Capacitive Comparator with Wide Input Common Mode;2024 IEEE International Solid-State Circuits Conference (ISSCC);2024-02-18

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