High mobility Si/SiGe strained channel MOS transistors with HfO/sub 2//TiN gate stack
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/8960/28396/01269365.pdf?arnumber=1269365
Cited by 9 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Dimensional Effect on Analog/RF Performance of Dual Material Gate Junctionless FinFET at 7 nm Technology Node;Transactions on Electrical and Electronic Materials;2023-05-08
2. Work-Function Variability impact on the performance of Vertically Stacked GAA FETs for sub-7nm Technology Node;2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON);2022-11-26
3. Design and Deep Insights into Sub-10 nm Spacer Engineered Junctionless FinFET for Nanoscale Applications;ECS Journal of Solid State Science and Technology;2021-01-01
4. Impact of WFV on electrical parameters due to high-k/metal gate in SiGe channel tunnel FET;Microelectronic Engineering;2019-06
5. A 3D statistical simulation study of titanium metal gate WFV on electrical parameters in n-channel Ge step-FinFET;Applied Physics A;2018-01-09
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