Author:
Heechun Park ,Taewhan Kim
Funder
CISS of Global Frontier project by MSIP in Korea
ITRC program of NIPA by MSIP in Korea
Seoul R&BD Program (RI130006)
Brain Korea 21 Plus Project in 2014
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software
Cited by
7 articles.
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1. Clock Power Reduction Using NDR Routing;Lecture Notes in Electrical Engineering;2021
2. A Novel Hybrid Delay Unit Based on Dummy TSVs for 3-D On-Chip Memory;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2018-07
3. TSV-Based 3-D ICs: Design Methods and Tools;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2017-10
4. Low-Power Clock Tree Synthesis for 3D-ICs;ACM Transactions on Design Automation of Electronic Systems;2017-05-31
5. A Study of 3-D Power Delivery Networks With Multiple Clock Domains;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2016-11