A Unique Approach towards Serial Parallel Multiplier to Reduce Number of Components
Author:
Affiliation:
1. PES University,Department of Electronics and Communication Engineering,Banglore,Karnataka
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10169136/10169900/10170298.pdf?arnumber=10170298
Reference12 articles.
1. A Two-Speed, Radix-4, Serial–Parallel Multiplier
2. Performance Comparison of Serial and Parallel Multipliers in Massively Parallel Environment
3. Design of Low Area and Low Power Systolic Serial Parallel Multiplier using CNTFETs
4. VLSI Design of High Speed and Area Efficient Radix-8 Serial Parallel Multiplier;chandrakala;Eur J Mol Clin Med,2020
5. Comparative Analysis of Multipliers (serial and parallel with radix based on booth algorithm);bordiya;International Journal of Engineering Research and Technology (IJERT),2013
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