A 1.0 V 40mW 10b 100MS/s pipeline ADC in 90nm CMOS-Reference-Cited by-同舟云学术

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A 1.0 V 40mW 10b 100MS/s pipeline ADC in 90nm CMOS

Published:2005 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005.
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Author:

Ishii H.,Tanabe K.,Iida T.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/10489/33245/01568688.pdf?arnumber=1568688

Cited by 8 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Slew-rate Comparison of single-ended amplifiers-the Folded Cascode and the Recycling Folded Cascode;2023 20th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE);2023-10-25

2. Small-Signal Analysis of a Differential Two-Stage Folded-Cascode CMOS Op Amp;JSTS:Journal of Semiconductor Technology and Science;2014-12-30

3. A reference-free 7-bit 500 MS/s pipeline ADC using current-mode reference shifting and quantizers with built-in thresholds;Analog Integrated Circuits and Signal Processing;2013-02-07

4. Multirate Cascaded Discrete-Time Low-Pass ΔΣ Modulator for GSM/Bluetooth/UMTS;IEEE Journal of Solid-State Circuits;2010-06

5. A 0.9-V 12-bit 40-MSPS Pipeline ADC for Wireless Receivers;IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences;2010

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