Optimal index-bit allocation for dynamic post-correction of analog-to-digital converters
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Signal Processing
Link
http://xplorestaging.ieee.org/ielx5/78/30126/01381757.pdf?arnumber=1381757
Cited by 13 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Digital Non-Linearity Calibration for ADCs With Redundancy Using a New LUT Approach;IEEE Transactions on Circuits and Systems I: Regular Papers;2021-08
2. Non-Linear Calibration of Pipeline ADCs using a Histogram-Based Estimation of the Redundant INL;2020 18th IEEE International New Circuits and Systems Conference (NEWCAS);2020-06
3. Accurate Sine-Wave Amplitude Measurements Using Nonlinearly Quantized Data;IEEE Transactions on Instrumentation and Measurement;2015-12
4. Toward Adaptation of ADCs to Operating Conditions through On-chip Correction;2015 IEEE Computer Society Annual Symposium on VLSI;2015-07
5. Look-Up Tables, Dithering and Volterra Series for ADC Improvements;Design, Modeling and Testing of Data Converters;2013-10-06
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