Minimizing DAG Utilization by Exploiting SMT

Author:

Osborne Sims Hill1,Bakita Joshua1,Chen Jingyuan1,Yandrofski Tyler1,Anderson James H.1

Affiliation:

1. University of North Carolina,Dept. of Computer Science,Chapel Hill,North Carolina,U.S.A

Publisher

IEEE

Reference57 articles.

1. Exploiting Simultaneous Multithreading in Priority-Driven Hard Real-Time Systems

2. Temporal separation for hardware-based I/O virtualization for mixed-criticality embedded real-time systems using PCIe SR-IOV;muench;In 2014 Workshop Proceedings on Architecture of Computing Systems (ARCS),2014

3. Analysis of Federated and Global Scheduling for Parallel Real-Time Tasks

4. SMART (strategic memory allocation for real-time) cache design

5. Integrated Modular Avionics (IMA) Partition Scheduling with Conflict-Free I/O for Multicore Avionics Systems

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1. Co-Located Parallel Scheduling of Threads to Optimize Cache Sharing;2023 IEEE Real-Time Systems Symposium (RTSS);2023-12-05

2. DAG Scheduling for Clustered Many-Core Processor Considering Execution-Time-Reduction Effectiveness;2023 IEEE/ACM 27th International Symposium on Distributed Simulation and Real Time Applications (DS-RT);2023-10-04

3. FPGA implementation of hardware accelerated RTOS based on real-time event handling;The Journal of Supercomputing;2023-03-13

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