Author:
Okamoto H.,Yasutake N.,Kusunoki N.,Adachi K.,Itokawa H.,Miyano K.,Ishida T.,Hokazono A.,Kawanaka S.,Mizushima I.,Azuma A.,Toyoshima Y.
Cited by
2 articles.
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1. Effective Suppression of Vt Roll-Up for pMOS With Embedded SiGe Source/Drain;IEEE Transactions on Electron Devices;2024-07
2. Control of etch and deposition for embedded SiGe;2010 IEEE/SEMI Advanced Semiconductor Manufacturing Conference (ASMC);2010-07