Low Switching Loss Dual RESURF 40 V N-LDMOS with Grounded Field Plate for DC-DC Converters

Author:

Du Hao Yang1,Matsuda Jun-Ichi1,Kuwana Anna1,Kobayashi Haruo1

Affiliation:

1. Gunma University 1-5-1, Tenjin-cho Kiryu,Division of Electronics and Informatics,Gunma,Japan

Publisher

IEEE

Reference5 articles.

1. Device Simulation;yamaguchi;Advance Simulation (AdvanceSoft Corporation),2015

2. Analysis of Switching Characteristics of Dual RESURF 40 V N-LDMOS Transistor with Grounded Field Plate;du;Proceedings of ICT,2021

3. Using two-dimensional filament modeling to predict Ldmos and Scrldmos behavior under high current ESD conditions

4. Low Switching Loss and Scalable 20-40 V LDMOS Transistors with Low Specific On-Resistance;matsuda;Proceedings of ICT,2018

5. A Low Switching Loss 40 V Dual RESURF LDMOS Transistor with Low Specific On-Resistance;matsuda;Proc ICME,2017

Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. ESD-capability Study of High-voltage nLDMOSs with out the Drift Region DPW Effect;2023 International Conference on Consumer Electronics - Taiwan (ICCE-Taiwan);2023-07-17

2. Robust ESD Capability of High-voltage nLDMOSs with Embedded Floating P+ Structures in the Drain Side;2023 9th International Conference on Applied System Innovation (ICASI);2023-04-21

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