Interleaved Planar Packaging Method of Multichip SiC Power Module for Thermal and Electrical Performance Improvement-Reference-Cited by-同舟云学术

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Interleaved Planar Packaging Method of Multichip SiC Power Module for Thermal and Electrical Performance Improvement

Published:2022-02 Issue:2 Volume:37 Page:1615-1629
ISSN:0885-8993
Container-title:IEEE Transactions on Power Electronics
language:
Short-container-title:IEEE Trans. Power Electron.

Author:

Yang Fengtao¹^ORCID,Lixin Jia¹,Wang Laili¹^ORCID,Zhang Fan¹,Wang Binyu¹,Zhao Cheng¹^ORCID,Wang Jianpeng¹^ORCID,Bayer Christoph²,Ferreira Jan³^ORCID

Affiliation:

1. School of Electrical Engineering, Xi'an Jiaotong University, Xi'an, China

2. Fraunhofer Institute for Integrated Systems and Device Technology IISB, Erlangen, Germany

3. Department of Telecommunication Engineering, University of Twente, Enschede, The Netherlands

Funder

National Key Research and Development Program of China

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/63/9575153/09520279.pdf?arnumber=9520279

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3. A Comprehensive Design Method for Multichip Double-Sided Cooling Power Module With Multidimensional Self-and Mutual Inductances;IEEE Transactions on Power Electronics;2024-08

4. Hybrid Double-Side Cooled Package for Multichip GaN Power Module With Optimal Current Sharing at High Switching Speed;IEEE Journal of Emerging and Selected Topics in Power Electronics;2024-08

5. An Analytical Switching Loss Model for SiC MOSFET Considering Temperature-Dependent Reverse Recovery Over an Extremely Wide High-Temperature Range;IEEE Transactions on Power Electronics;2024-06

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