Measurement of Circuit Parasitics of SiC MOSFET in a Half-Bridge Configuration
Author:
Affiliation:
1. Department of Electrical Engineering, Indian Institute of Science, Bangalore, India
Funder
Ministry of Electronics and Information Technology
NAMPET III
Design and Development of WBG Device based High Current Converters for Industry Applications
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/63/9803836/09779471.pdf?arnumber=9779471
Reference25 articles.
1. Measurement of important circuit parasitics for switching transient analysis of SiC MOSFET and Schottky diode pair
2. Probing techniques for accurate voltage measurements on power supplies with oscilloscopes,2019
3. Parasitic Inductance and Capacitance-Assisted Active Gate Driving Technique to Minimize Switching Loss of SiC MOSFET
4. Characterization of power electronics system interconnect parasitics using time domain reflectometry
5. A New Characterization Technique for Extracting Parasitic Inductances of SiC Power MOSFETs in Discrete and Module Packages Based on Two-Port S-Parameters Measurement
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