Ultra low energy arsenic implant limits on sheet resistance and junction depth
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/6881/18528/00852790.pdf?arnumber=852790
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1. High-Work-Function Ir/HfLaO ${\rm p}$-MOSFETs Using Low-Temperature-Processed Shallow Junction;IEEE Transactions on Electron Devices;2008-03
2. Very Low Vt [Ir-Hf]/HfLaO CMOS Using Novel Self-Aligned Low Temperature Shallow Junctions;2007 IEEE International Electron Devices Meeting;2007-12
3. Photothermal Activation of Shallow Dopants Implanted in Silicon;Journal of Electronic Materials;2007-10-05
4. Effect of germanium pre-amorphization on solid-phase epitaxial regrowth of antimony and arsenic ion-implanted silicon;Materials Science and Engineering: B;2004-12
5. Drive Current Enhancement in Sub-50 nm CMOS by Reduction of SDE Resistance with Laser Thermal Process;Journal of The Electrochemical Society;2004
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