NDSTRNG: Non-Deterministic Sampling-Based True Random Number Generator on SoC FPGA Systems

Author:

Chen Yucong1ORCID,Tian Yanshan1ORCID,Zhou Rui1,Martínez Castro Diego2ORCID,Guo Deke3ORCID,Zhou Qingguo1ORCID

Affiliation:

1. School of Information Science and Engineering, Lanzhou University, Lanzhou, Gansu, People’s Republic of China

2. Department of Automation and Electronics, Faculty of Engineering, Universidad Autónoma de Occidente, Cali, Colombia

3. Science and Technology Laboratory on Information Systems Engineering, National University of Defense Technology, Changsha, Hunan, People’s Republic of China

Funder

National Key R&D Program of China

Fundamental Research Funds for the Central Universities

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Reference44 articles.

1. Survey on FPGA Architecture and Recent Applications

2. FPGA Dynamic and Partial Reconfiguration

3. Security analysis of pseudo-random number generators with input

4. CPU time jitter based non-physical true random number generator;Mueller,2014

5. Random numbers from CPU execution time jitter;Edge.,2015

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