Time-Multiplexing of Signals Using Highly Integrated Digital Delay: an FPGA Implementation-Reference-Cited by-同舟云学术

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Time-Multiplexing of Signals Using Highly Integrated Digital Delay: an FPGA Implementation

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Container-title:IEEE Nuclear Science Symposium Conference Record, 2005
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Author:

Bocci V.,Chiodi G.,Iacoangeli F.,Nobrega R.,Pinci D.,Rinaldi W.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/10641/33578/01596279.pdf?arnumber=1596279

Cited by 6 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Review of Advancements and Trends in Time-to-Digital Converters Based on FPGA;IEEE Transactions on Instrumentation and Measurement;2024

2. A Chaotic Time-Delay System with Saturation Nonlinearity;International Journal of System Dynamics Applications;2017-07

3. Asynchronous delay doubler and binary low-pass filter for a time-delay chaotic circuit;International Journal of Circuit Theory and Applications;2015-09-22

4. Chaotic Attractor in a Novel Time-Delayed System with a Saturation Function;Handbook of Research on Advanced Intelligent Control Engineering and Automation;2015

5. Study of the performance of the LHCb muon chambers with cosmic rays;Journal of Instrumentation;2011-12-06

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