Author:
Bi Yu,Harpe P.,van der Meijs N. P.
Cited by
13 articles.
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1. Relaxing LER requirement in EUV lithography;Design-Process-Technology Co-optimization for Manufacturability XII;2018-03-20
2. Statistical Capacitance Extraction Based on Continuous-Surface Geometric Model;Advanced Field-Solver Techniques for RC Extraction of Integrated Circuits;2014
3. Process Variation-Aware Capacitance Extraction;Advanced Field-Solver Techniques for RC Extraction of Integrated Circuits;2014
4. Extracting Frequency-Dependent Substrate Parasitics;Advanced Field-Solver Techniques for RC Extraction of Integrated Circuits;2014
5. Substrate Resistance Extraction with Boundary Element Method;Advanced Field-Solver Techniques for RC Extraction of Integrated Circuits;2014