Learning hardware using multiple-valued logic - Part 1: introduction and approach-Reference-Cited by-同舟云学术

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Learning hardware using multiple-valued logic - Part 1: introduction and approach

Published:2002-05 Issue:3 Volume:22 Page:41-51
ISSN:0272-1732
Container-title:IEEE Micro
language:en
Short-container-title:IEEE Micro

Author:

Perkowski M.,Foote D.,Qihong Chen ,Al-Rabadi A.,Jozwiak L.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Link

http://xplorestaging.ieee.org/ielx5/40/21821/01013303.pdf?arnumber=1013303

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3. Hardware Synthesis for Reconfigurable Heterogeneous Pipelined Accelerators;Fifth International Conference on Information Technology: New Generations (itng 2008);2008-04

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