A 150 mV, Sub-1 nW, 0.75%-Full-Scale INL Delta-Sigma ADC for Power-Autonomous Sensor Nodes
Author:
Affiliation:
1. University of Pisa,Department of Information Engineering,Italy
2. IEIIT Istitute of Italian National Research Council (CNR),Pisa,Italy
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9911257/9911222/09911235.pdf?arnumber=9911235
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1. A CMOS transconductance-C filter technique for very high frequencies
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4. CMOS inverter linearization technique with active source degeneration
5. A 0.2V, 7.5 µW, 20 kHz ?? modulator with 69 dB SNR in 90 nm CMOS;wismar;Proc ESSCIRC 2007,2007
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