Optimization of System Design and Calibration Algorithm for SPAD-Based LiDAR Imager-Reference-Cited by-同舟云学术

Optimization of System Design and Calibration Algorithm for SPAD-Based LiDAR Imager

Published:2022 Issue: Volume:71 Page:1-10
ISSN:0018-9456
Container-title:IEEE Transactions on Instrumentation and Measurement
language:
Short-container-title:IEEE Trans. Instrum. Meas.

Author:

Li Dong¹^ORCID,Ma Rui¹^ORCID,Wang Xiayu¹^ORCID,Hu Jin¹^ORCID,Zhu Zhangming¹^ORCID

Affiliation:

1. Shaanxi Key Laboratory of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi’an, China

Funder

National Natural Science Foundation of China

Key Research and Development Program of Shaanxi

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Instrumentation

Link

http://xplorestaging.ieee.org/ielx7/19/9717300/09895278.pdf?arnumber=9895278

Reference20 articles.

1. A 64 $\times$ 64-Pixels Digital Silicon Photomultiplier Direct TOF Sensor With 100-MPhotons/s/pixel Background Rejection and Imaging/Altimeter Mode With 0.14% Precision Up To 6 km for Spacecraft Navigation and Landing

2. A 100-m Range 10-Frame/s 340$\,\times\, $96-Pixel Time-of-Flight Depth Sensor in 0.18-$\mu\hbox{m}$ CMOS

3. 7.4 A 256×128 3D-stacked (45 nm) SPAD FLASH LiDAR with 7-level coincidence detection and progressive gating for 100 m range and 10klux background light;padmanabhan;IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers,2021

4. 5.2 A 1200×900 6?m 450 fps geiger-mode vertical avalanche photodiodes CMOS image sensor for a 250 m time-of-flight ranging system using direct-indirect-mixed frame synthesis with configurable-depth-resolution down to 10 cm;okino;IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers,2020

5. A 30-frames/s, $252\times144$ SPAD Flash LiDAR With 1728 Dual-Clock 48.8-ps TDCs, and Pixel-Wise Integrated Histogramming

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