Fan-Out Wafer Level Packaging - A Platform for Advanced Sensor Packaging-Reference-Cited by-同舟云学术

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Fan-Out Wafer Level Packaging - A Platform for Advanced Sensor Packaging

Published:2019-05 Issue: Volume: Page:
ISSN:
Container-title:2019 IEEE 69th Electronic Components and Technology Conference (ECTC)
language:
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Author:

Braun Tanja,Becker Karl-Friedrich,Hoelck Ole,Voges Steve,Kahle Ruben,Graap Pascal,Wohrmann Markus,Aschenbrenner R.,Braun Tanja,Dreissigacker Marc,Schneider-Ramelow Martin,Lang Klaus-Dieter

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/8795274/8811008/08811304.pdf?arnumber=8811304

Cited by 16 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. World’s Smallest, Membrane-Based Capacitive Differential Pressure Sensor-Package Structure, Material Selection, Assembly Challenges and Solutions;2024 IEEE 74th Electronic Components and Technology Conference (ECTC);2024-05-28

2. A novel FOWLP method to integrate delicate MEMS components;2023 IEEE 73rd Electronic Components and Technology Conference (ECTC);2023-05

3. Wafer Level Chip Scale Package Technology Applied to MEMS Pressure Sensor;2023 IEEE 73rd Electronic Components and Technology Conference (ECTC);2023-05

4. Synthesized Improvement of Die Fly and Die Shift Concerning the Wafer Molding Process for Ultrafine SAW Filter FOWLP;Electronics;2023-04-30

5. State-Of-The-Art of Advanced Packaging;Chiplet Design and Heterogeneous Integration Packaging;2023

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