Enhanced barrier seed metallization for integration of high-density high aspect-ratio copper-filled 3D through-silicon via interconnects-Reference-Cited by-同舟云学术

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Enhanced barrier seed metallization for integration of high-density high aspect-ratio copper-filled 3D through-silicon via interconnects

Published:2012-05 Issue: Volume: Page:
ISSN:
Container-title:2012 IEEE 62nd Electronic Components and Technology Conference
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Author:

Civale Yann,Armini Silvia,Philipsen Harold,Redolfi Augusto,Velenis Dimitrios,Croes Kristof,Heylen Nancy,El-Mekki Zaid,Vandersmissen Kevin,Beyer Gerald,Swinnen Bart,Beyne Eric

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/6241679/6248788/06248928.pdf?arnumber=6248928

Cited by 17 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Optimization of deep reactive ion etching for microscale silicon hole arrays with high aspect ratio;Micro and Nano Systems Letters;2022-09-09

2. Wet processes deposition for HAR TSV metallization using electroless Co liner and alkaline Cu seed layer;2022 IEEE International Interconnect Technology Conference (IITC);2022-06-27

3. Development of Metallization Process for Fine Pitch TSV;2021 IEEE 23rd Electronics Packaging Technology Conference (EPTC);2021-12-07

4. A TSV-Last Approach for 3D-IC Integration and Packaging using WNi Platable Barrier Layer;2021 IEEE 71st Electronic Components and Technology Conference (ECTC);2021-06

5. Impact of Electroless-Ni Seed Layer on Cu-Bottom-up Electroplating in High Aspect Ratio (>10) TSVs for 3D-IC Packaging Applications;2020 IEEE 70th Electronic Components and Technology Conference (ECTC);2020-06

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