Measurement of Circuit Parasitics of a 200kW SiC based Stack
Author:
Affiliation:
1. Indian Institute of Science, Bengaluru,Department of Electrical Engineering,Bengaluru,India
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10509012/10509018/10509473.pdf?arnumber=10509473
Reference10 articles.
1. Detection of Cross-Turn-On and Selection of Off Drive Voltage for an SiC Power Module
2. Design Considerations and Performance Evaluation of 1200-V 100-A SiC MOSFET-Based Two-Level Voltage Source Converter
3. Measurement of Circuit Parasitics of SiC MOSFET in a Half-Bridge Configuration
4. Prediction Procedure of Parasitic Parameters Considering Laminated Bus Bar Geometries Based on Online Machine Learning
5. Develop Parasitic Inductance Model for the Planar Busbar of an IGBT H Bridge in a Power Inverter
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