A 1.2V 30nm 1.6Gb/s/pin 4Gb LPDDR3 SDRAM with input skew calibration and enhanced control scheme-Reference-Cited by-同舟云学术

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A 1.2V 30nm 1.6Gb/s/pin 4Gb LPDDR3 SDRAM with input skew calibration and enhanced control scheme

Published:2012-02 Issue: Volume: Page:
ISSN:
Container-title:2012 IEEE International Solid-State Circuits Conference
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Author:

Bae Yong-Cheol,Park Joon-Young,Rhee Sang Jae,Ko Seung Bum,Jeong Yonggwon,Noh Kwang-Sook,Son Younghoon,Youn Jaeyoun,Chu Yonggyu,Cho Hyunyoon,Kim Mijo,Yim Daesik,Kim Hyo-Chang,Jung Sang-Hoon,Choi Hye-In,Yim Sungmin,Lee Jung-Bae,Choi Joo Sun,Oh Kyungseok

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/6171933/6176863/06176871.pdf?arnumber=6176871

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