2.1 28Gb/s 560mW multi-standard SerDes with single-stage analog front-end and 14-tap decision-feedback equalizer in 28nm CMOS-Reference-Cited by-同舟云学术

2.1 28Gb/s 560mW multi-standard SerDes with single-stage analog front-end and 14-tap decision-feedback equalizer in 28nm CMOS

Published:2014-02 Issue: Volume: Page:
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Container-title:2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC)
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Author:

Kimura Hiroshi,Aziz Pervez,Jing Tai,Sinha Ashutosh,Narayan Ram,Gao Hairong,Jing Ping,Hom Gary,Liang Anshi,Zhang Eric,Kadkol Aniket,Kothari Ruchi,Chan Gordon,Sun Yehui,Ge Benjamin,Zeng Jason,Ling Kathy,Wang Michael,Malipatil Amaresh,Kotagiri Shiva,Li Lijun,Abel Chris,Zhong Freeman

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/6747109/6757318/06757327.pdf?arnumber=6757327

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