3.1 A 25Gb/s ADC-based serial line receiver in 32nm CMOS SOI-Reference-Cited by-同舟云学术

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3.1 A 25Gb/s ADC-based serial line receiver in 32nm CMOS SOI

Published:2016-01 Issue: Volume: Page:
ISSN:
Container-title:2016 IEEE International Solid-State Circuits Conference (ISSCC)
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Author:

Rylov Sergey,Beukema Troy,Toprak-Deniz Zeynep,Toifl Thomas,Liu Yong,Agrawal Ankur,Buchmann Peter,Rylyakov Alexander,Beakes Michael,Parker Benjamin,Meghelli Mounir

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/7405163/7417881/07417904.pdf?arnumber=7417904

Cited by 22 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Digital-to-Analog Converters for 100+ Gb/s Wireline Transmitters: Architectures, Circuits, and Calibration;2024 IEEE Custom Integrated Circuits Conference (CICC);2024-04-21

2. 500 MS/s 4-Bit Flash ADC with Complementary Architecture;Journal of Electromagnetic Engineering and Science;2024-01-31

3. A 32 Gb/s NRZ PI-Based Baud-Rate Digitial Clock and Data Recovery Circuit in 28nm CMOS Technology;2023 8th International Conference on Integrated Circuits and Microsystems (ICICM);2023-10-20

4. A 72-GS/s, 8-Bit DAC-Based Wireline Transmitter in 4-nm FinFET CMOS for 200+ Gb/s Serial Links;IEEE Journal of Solid-State Circuits;2023-04

5. ADC/DSP-Based Receivers for High-Speed Serial Links;Analog Circuits for Machine Learning, Current/Voltage/Temperature Sensors, and High-speed Communication;2022

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