Functional Interposer Embedded with Multi-Terminal Si Capacitor for 2.5D/3D Applications Using Planarization and Bumpless Chip-on-Wafer (COW)
Author:
Affiliation:
1. Tokyo Institute of Technology,Kanagawa,Japan
2. Murata Manufacturing Co., Ltd.,Kyoto,Japan
3. Industrial Technology Research Institute,Hsinchu,Taiwan
Funder
Tokyo Institute of Technology
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9816066/9816372/09816575.pdf?arnumber=9816575
Reference9 articles.
1. Miniaturized 3D Functional Interposer Using Bumpless Chip-on-Wafer (COW) Integration with Capacitors
2. InFO (Wafer Level Integrated Fan-Out) Technology
3. Thinned wafer multi-stack 3DI technology
4. First Demonstration of Silicon-Like >250 I/O Per mm Per Layer Multilayer RDL on Glass Panel Interposers by Embedded Photo-Trench and Fly Cut Planarization
5. Voidless Chip-on-Wafer Process for Functional Interposer
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